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1 ? fn6028.2 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 321-724-7143 | intersil and design is a registered trademark of intersil americas inc. copyright intersil americas inc. 2002, 2004, all rights reserved ISL43110, isl43111 low-voltage, single supply, spst, high performance analog switches the intersil isl4311x are precis ion, high performance analog switches that are fully specified for 3.3v, 5v, and 12v operation, and feature improved leakage, icc, and switching time specifications. designed to operate from a single +2.4v to +12v supply, the low supply current (1 a max over the temperature and voltage ranges) and low leakage currents (1na) make these switches ideal for battery powered applications. low r on and fast switching speeds over a wide operating supply range increase these devices usefulness in industrial equipment, portable instruments, and as input signal multiplexers for new generation, low supply voltage data converters. some of the sma llest packages are available alleviating board space limitat ions, and making intersil?s newest line of low-voltage switches an ideal solution. the isl4311x are single-pole/single-throw (spst) switches, with the ISL43110 being normally open (no), and the isl43111 being normally closed (nc). table 1 summarizes the perform ance of this family. for similar performance 5v supply versions, see the isl43112/13 data sheet. related literature ? tech brief tb363 ?guidelines for handling and processing moisture sensitive surface mount devices (smds)? features ? fully specified at 3. 3v, 5v, and 12v supplies ? available in sot-23 packaging ? single supply operation. . . . . . . . . . . . . . . . . +2.4v to +12v ? on resistance (r on max). . . . . . . . . . . . . 20 ? (v+ = 5v) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 ? (v+ = 12v) ?r on flatness . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 ? ? charge injection (max) . . . . . . . . . . . . . . . . . . . . . . . . . . 10pc ? low power consumption (p d max). . . . . . . . . . . . . . . .<5 w ? low leakage current (max at 85c) . 10na (off leakage) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20na (on leakage) ? fast switching action -t on (max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80ns -t off (max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50ns ? minimum 2000v esd protection per method 3015.7 ? ttl, cmos compatible ? pb-free available applications ? battery powered, handheld, and portable equipment - cellular/mobile phones, pagers - laptops, notebooks, palmtops, pdas ? communications systems -radios - pbx, pabx ? test equipment - logic and spectrum analyzers - portable meters, dvm, dmm ? medical equipment - ultrasound, mri, cat scan - electrocardiograph, blood analyzer ? heads-up displays ? audio and video switching ? general purpose circuits - +3v/+5v dacs and adcs - sample and hold circuits - digital filters - operational amplifier gain switching networks - high frequency analog switching - high speed multiplexing - integrator reset circuits table 1. features at a glance ISL43110 isl43111 number of switches 1 1 configuration no nc 3.3v r on 15 ? 15 ? 3.3v t on / t off 55ns / 28ns 55ns / 28ns 5v r on 11 ? 11 ? 5v t on / t off 45ns / 20ns 45ns / 20ns 12v r on 7 ? 7 ? 12v t on / t off 37ns / 21ns 37ns / 21ns packages 8 ld soic, 5 ld sot-23 data sheet july 2004
2 pinouts (note 1) ISL43110 (soic) top view ISL43110 (sot-23) top view isl43111 (soic) top view isl43111 (sot-23) top view note: 1. switches shown for logic ?0? input. com gnd v+ no in 6 7 8 5 1 2 3 4 n.c. n.c. n.c. 4 5 1 2 3 com v+ gnd no in com gnd v+ nc in 6 7 8 5 1 2 3 4 n.c. n.c. n.c. 4 5 1 2 3 com v+ gnd nc in pin descriptions pin function v+ system power supply input (+2.4v to +12v) gnd ground connection in digital control input com analog switch common pin no analog switch normally open pin nc analog switch normally closed pin n.c. no internal connection truth table logic ISL43110 isl43111 0off on 1on off note: logic ?0? 0.8v. logic ?1? 2.4v. ordering information part no. (brand) temp. range (c) package pkg. dwg. # ISL43110ib -40 to 85 8 ld soic m8.15 ISL43110ib-t -40 to 85 tape and reel m8.15 ISL43110ibz (note) -40 to 85 8 ld soic (pb-free) m8.15 ISL43110ibz-t (note) -40 to 85 tape and reel (pb-free) m8.15 ISL43110ih-t (110i) -40 to 85 5 ld sot-23, tape and reel p5.064 ISL43110ihz-t (110i) (note) -40 to 85 5 ld sot-23, tape and reel (pb-free) p5.064 isl43111ib -40 to 85 8 ld soic m8.15 isl43111ib-t -40 to 85 tape and reel m8.15 isl43111ibz (note) -40 to 85 8 ld soic (pb-free) m8.15 isl43111ibz-t (note) -40 to 85 8 ld soic (pb-free) m8.15 isl43111ih-t (111i) -40 to 85 5 ld sot-23, tape and reel p5.064 isl43111ihz-t (111i) (note) -40 to 85 5 ld sot-23, tape and reel (pb-free) p5.064 note: intersil pb-free products em ploy special pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which is compatible with both snpb and pb-free soldering operations. intersil pb-free products are msl classified at pb-free peak reflow te mperatures that meet or exceed the pb-free requirements of ipc/jedec j std-020b. ISL43110, isl43111
3 absolute maximum rati ngs thermal information v+ to gnd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to15v input voltages in (note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((v+) + 0.3v) no, nc (note 2) . . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((v+) + 0.3v) output voltages com (note 2). . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((v+) + 0.3v) continuous current (any terminal) . . . . . . . . . . . . . . . . . . . . . 20ma peak current no, nc, or com (pulsed 1ms, 10% duty cycle, max) . . . . . . . . . . . . . . . . . . . . 30ma esd rating (per mil-std-883 method 3015). . . . . . . . . . . . . >2kv operating conditions temperature range isl4311xix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40c to 85c thermal resistance (typical, note 3) ja (c/w) 5 ld sot-23 package . . . . . . . . . . . . . . . . . . . . . . . 225 8 ld soic package . . . . . . . . . . . . . . . . . . . . . . . . . 170 maximum junction temperature (plastic package) . . . . . . . 150c moisture sensitivity (see technical brief tb363) all packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . level 1 maximum storage temperature range. . . . . . . . . . . . . -65c to 150c maximum lead temperature (soldering 10s) . . . . . . . . . . . . 300c (lead tips only) caution: stresses above those listed in ?abs olute maximum ratings? may cause permanent dam age to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. notes: 2. signals on no, nc, com, or in exceeding v+ or gnd are clamped by internal diodes. li mit forward diode current to maximum curr ent ratings. 3. ja is measured with the component mounted on a low effective ther mal conductivity test board in free air. see tech brief tb379 fo r details. electrical specifications: 5v supply test conditions: v+ = +4.5v to +5.5v, gnd = 0v, v inh = 2.4v, v inl = 0.8v (note 4), unless otherwise specified parameter test conditions temp (c) (note 5) min typ (note 5) max units analog switch characteristics analog signal range, v analog full 0 - v+ v on resistance, r on v+ = 4.5v, i com = 1.0ma, v com = 3.5v, see figure 4 25 - 11 20 ? full - 15 25 ? r on flatness, r flat(on) i com = 1.0ma, v com = 1v, 2v, 3v 25 - 1.5 3 ? full - 2.5 5 ? no or nc off leakage current, i no(off) or i nc(off) v+ = 5.5v, v com = 1v, 4.5v, v no or v nc = 4.5v, 1v, note 6 25 -1 0.01 1 na full -10 - 10 na com off leakage current, i com(off) v+ = 5.5v, v com = 4.5v, 1v, v no or v nc = 1v, 4.5v, note 6 25 -1 0.01 1 na full -10 - 10 na com on leakage current, i com(on) v + = 5.5v, v com = 1v, 4.5v, or v no or v nc = 1v, 4.5v, note 6 25 -1 0.01 1 na full -20 - 20 na digital input characteristics input voltage high, v inh full 2.4 - - v input voltage low, v inl full - - 0.8 v input current, i inh , i inl v+ = 5.5v, v in = 0v or v+ full -1 - 1 a dynamic characteristics turn-on time, t on v no or v nc = 3v, r l = 300 ? , c l = 35pf, v in = 0 to 3v, see figure 1 25 - 45 80 ns full - 50 120 ns turn-off time, t off v no or v nc = 3v, r l = 300 ? , c l = 35pf, v in = 0 to 3v, see figure 1 25 - 20 50 ns full - 28 75 ns charge injection, q c l = 1.0nf, v g = 0v, r g = 0 ? , see figure 2 25 - 2 10 pc off isolation r l = 50 ? , c l = 15pf, f = 100khz, see figure 3 25 - >90 - db ISL43110, isl43111
4 power supply rejection ratio r l = 50 ? , c l = 5pf, f = 1mhz 25 - 60 - db no or nc off capacitance, c off f = 1mhz, v no or v nc = v com = 0v, see figure 5 25 - 15 - pf com off capacitance, c com(off) f = 1mhz, v no or v nc = v com = 0v, see figure 5 25 - 15 - pf com on capacitance, c com(on) f = 1mhz, v no or v nc = v com = 0v, see figure 5 25 - 40 - pf power supply characteristics positive supply current, i+ v+ = 5.5v, v in = 0v or v+, switch on or off full -1 - 1 a notes: 4. v in = input voltage to perform proper function. 5. the algebraic convention, whereby the most negative value is a minimum and the most pos itive a maximum, is used in this data sheet. 6. leakage parameter is 100% tested at high temp, and guaranteed by correlation at 25c. electrical specific ations: 12v supply test conditions: v+ = +10.8v to +13v, gnd = 0v, v inh = 5v, v inl = 0.8v (note 4), unless otherwise specified parameter test conditions temp (c) (note 5) min typ (note 5) max units analog switch characteristics analog signal range, v analog full 0 - v+ v on resistance, r on v+ = 10.8v, i com = 1.0ma, v com = 10v 25 - 7 10 ? full - 8 15 ? r on flatness, r flat(on) i com = 1.0ma, v com = 3v, 6v, 9v 25 - 1 3 ? full - 1.5 5 ? no or nc off leakage current, i no(off) or i nc(off) v+ = 13v, v com = 1v, 10v, v no or v nc = 10v, 1v, note 6 25 -1 - 1 na full -10 - 10 na com off leakage current, i com(off) v+ = 13v, v com = 10v, 1v, v no or v nc = 1v, 10v, note 6 25 -1 - 1 na full -10 - 10 na com on leakage current, i com(on) v + = 13v, v com = 1v, 10v, or v no or v nc = 1v, 10v, note 6 25 -1 - 1 na full -20 - 20 na digital input characteristics input voltage high, v inh full 4 3 - v input voltage low, v inl full - - 0.8 v input current, i inh , i inl v+ = 13v, v in = 0v or v+ full -1 - 1 a dynamic characteristics turn-on time, t on v no or v nc = 10v, r l = 300 ? , c l = 35pf 25 - 37 80 ns full - 42 120 ns turn-off time, t off v no or v nc = 10v, r l = 300 ? , c l = 35pf 25 - 21 50 ns full - 26 75 ns charge injection, q c l = 1.0nf, v g = 0v, r g = 0 ? 25 - 8 20 pc off isolation r l = 50 ? , c l = 15pf, f = 100khz 25 - >90 - db power supply rejection ratio r l = 50 ? , c l = 5pf, f = 1mhz 25 - 67 - db no or nc off capacitance, c off f = 1mhz, v no or v nc = v com = 0v 25 - 15 - pf electrical specifications: 5v supply test conditions: v+ = +4.5v to +5.5v, gnd = 0v, v inh = 2.4v, v inl = 0.8v (note 4), unless otherwise specified (continued) parameter test conditions temp (c) (note 5) min typ (note 5) max units ISL43110, isl43111
5 com off capacitance, c com(off) f = 1mhz, v no or v nc = v com = 0v 25 - 15 - pf com on capacitance, c com(on) f = 1mhz, v no or v nc = v com = 0v 25 - 40 - pf power supply characteristics positive supply current, i+ v+ = 13v, v in = 0v or v+, switch on or off full -1 - 1 a electrical specifications: 3.3v supply test conditions: v+ = +3.0v to +3.6v, gnd = 0v, v inh = 2.4v, v inl = 0.8v (note 4), unless otherwise specified parameter test conditions temp (c) (note 5) min typ (note 5) max units analog switch characteristics analog signal range, v analog full 0 - v+ v on resistance, r on v+ = 3v, i com = 1.0ma, v com = 1.5v 25 - 15 30 ? full - 18 40 ? r on flatness, r flat(on) i com = 1.0ma, v com = 0.5v, 1v, 1.5v 25 - 3 5.5 ? full - 4 7 ? no or nc off leakage current, i no(off) or i nc(off) v+ = 3.6v, v com = 1v, 3v, v no or v nc = 3v, 1v, note 6 25 -1 - 1 na full -10 - 10 na com off leakage current, i com(off) v+ = 3.6v, v com = 3v, 1v, v no or v nc = 1v, 3v, note 6 25 -1 - 1 na full -10 - 10 na com on leakage current, i com(on) v + = 3.6v, v com = 1v, 3v, or v no or v nc = 1v, 3v, or floating, note 6 25 -1 - 1 na full -20 - 20 na digital input characteristics input voltage high, v inh full 2.4 - - v input voltage low, v inl full - - 0.8 v input current, i inh , i inl v+ = 3.6v, v in = 0v or v+ full -1 - 1 a dynamic characteristics turn-on time, t on v no or v nc = 1.5v, r l = 300 ? , c l = 35pf, v in = 0 to 3v 25 - 55 100 ns full - 70 150 ns turn-off time, t off v no or v nc = 1.5v, r l = 300 ? , c l = 35pf, v in = 0 to 3v 25 - 28 60 ns full - 35 85 ns charge injection, q c l = 1.0nf, v g = 0v, r g = 0 ? 25 - 2 10 pc off isolation r l = 50 ? , c l = 15pf, f = 100khz 25 - >90 - db power supply rejection ratio r l = 50 ? , c l = 5pf, f = 1mhz 25 - 58 - db no or nc off capacitance, c off f = 1mhz, v no or v nc = v com = 0v 25 - 15 - pf com off capacitance, c com(off) f = 1mhz, v no or v nc = v com = 0v 25 - 15 - pf com on capacitance, c com(on) f = 1mhz, v no or v nc = v com = 0v 25 - 40 - pf power supply characteristics positive supply current, i+ v+ = 3.6v, v in = 0v or v+, switch on or off full -1 - 1 a electrical specific ations: 12v supply test conditions: v+ = +10.8v to +13v, gnd = 0v, v inh = 5v, v inl = 0.8v (note 4), unless otherwise specified (continued) parameter test conditions temp (c) (note 5) min typ (note 5) max units ISL43110, isl43111
6 test circuits and waveforms logic input waveform is inverted for switches that have the opposite logic sense. figure 1a. measurement points c l includes fixture and stray capacitance. figure 1b. test circuit figure 1. switching times figure 2a. measurement poin ts figure 2b. test circuit figure 2. charge injection figure 3. off isolation test circuit figure 4. r on test circuit 50% t r < 20ns t f < 20ns t off 90% 3v or 5v 0v 0v t on logic input switch input switch output 90% v out v out v (no or nc) r l r l r on () + ------------------------------ = switch input logic input v out r l c l com no or nc in 300 ? 35pf gnd v + c v out ? v out on off on q = ? v out x c l switch output logic input c l v out r g v g gnd com no or nc v+ c logic input in analyzer r l signal generator v+ c 0v or v+ no or nc com in gnd v+ c 0.8v or v inh no or nc com in gnd v com v 1 r on = v1/1ma 1ma ISL43110, isl43111
7 detailed description the ISL43110 and isl43111 analog switches offer precise switching capability from a single 2.4v to 12v supply with low on-resistance and high speed operation. the devices are especially well suited to portable battery powered equipment thanks to the low operating supply voltage (2.4v), low power consumption (5 w), low leakage currents (1na max), and the tiny sot-23 packaging. high frequency applications also benefit from the wide bandwidth, and the very high off isolation. supply sequencing and overvoltage protection as with any cmos device, proper power supply sequencing is required to protect the device from excessive input currents which might permanently damage the ic. all i/o pins contain esd protection diodes from the pin to v+ and to gnd (see figure 6). to prevent forward biasing these diodes, v+ must be applied before any input signals, and input signal voltages must remain between v+ and gnd. if these conditions cannot be guaranteed, then one of the following two protection methods should be employed. logic inputs can easily be protected by adding a 1k ? resistor in series with the input (see figure 6). the resistor limits the input current below the threshold that produces permanent damage, and the sub-microamp input current produces an insignificant voltage drop during normal operation. adding a series resistor to the switch input defeats the purpose of using a low r on switch, so two small signal diodes can be added in series with the supply pins to provide overvoltage protection for all pins (see figure 6). these additional diodes limit the analog signal from 1v below v+ to 1v above gnd. the low leak age current performance is unaffected by this approach, but the switch resistance may increase, especially at low supply voltages. power-supply considerations the isl4311x construction is typical of most cmos analog switches, except that there are only two supply pins: v+ and gnd. unlike switches with a 13v maximum supply voltage, the isl4311x 15v maximum supply voltage provides plenty of room for the 10% tolerance of 12v supplies, as well as room for overshoot and noise spikes. the minimum recommended supply voltage is 2.4v. it is important to note that the inpu t signal range, switching times, and on-resistance degrade at lower supply voltages. refer figure 5. capacitance test circuit test circuits and waveforms (continued) v+ gnd no or nc com in impedance analyzer 0v or v+ figure 6. overvoltage protection gnd v com v no or nc optional protection v+ in diode optional protection diode optional protection resistor ISL43110, isl43111
8 to the electrical specification tables and typical performance curves for details. v+ and gnd power the inter nal cmos switches and set their analog voltage limits. these supplies also power the internal logic and level shifters. the level shifters convert the input logic levels to switched v+ and gnd signals to drive the analog switch gate terminals. this family of switches c annot be operated with bipolar supplies, because the input switching point becomes negative in this configuration. for a 5v single spst switch, see the isl43112/13 data sheet. logic-level thresholds this switch family is ttl compatible (0.8v and 2.4v) over a supply range of 3v to 11v, and the full temperature range (see figure 10). at 12v the low temperature v ih level is about 2.5v. this is still be low the ttl guaranteed high output minimum level of 2.8v, but noise margin is reduced. for best results with a 12v supply, use a logic family the provides a v oh greater than 3v. the digital input stages draw supply current whenever the digital input voltage is not at one of the supply rails. driving the digital input signals from g nd to v+ with a fast transition time minimizes power dissipation. high-frequency performance in 50 ? systems, signal response is reasonably flat to 20mhz, with a -3db bandwidth exceeding 200mhz (see figure 15). figure 15 also illustrates that the frequency response is very consistent over a wide v+ range, and for varying analog signal levels. an off switch acts like a capacitor and passes higher frequencies with less attenuation, resulting in signal feedthrough from a switch?s input to its output. off isolation is the resistance to this feedthrough. figure 16 details the high off isolation provided by this family. at 10mhz, off isolation is about 50db in 50 ? systems, decreasing approximately 20db per decade as frequency increases. higher load impedances decrease off isolation due to the voltage divider action of the switch off impedance and the load impedance. leakage considerations reverse esd protection diodes are internally connected between each analog-signal pin and both v+ and gnd. one of these diodes conducts if any analog signal exceeds v+ or gnd. virtually all the analog leakage current comes from the esd diodes to v+ or gnd. although the esd diodes on a given signal pin are identical and therefore fairly well balanced, they are reverse biased differently. each is biased by either v+ or gnd and the analog signal. this means their leakages will vary as the signal varies. the difference in the two diode leakages to the v+ and gnd pins constitutes the analog- signal-path leakage current. all analog leakage current flows between each pin and one of the supply terminals, not to the other switch terminal. this is why both sides of a given switch can show leakage curren ts of the same or opposite polarity. there is no connection between the analog-signal paths and v+ or gnd. typical performance curves t a = 25c, unless otherwise specified figure 7. on resistance vs supply voltage figure 8. on resistance vs switch voltage r on ( ? ) v+ (v) 3 4 5 6 7 8 9 10 11 12 13 i com = 1ma v com = (v+) - 1v 0 5 10 15 20 25 25c -40c 85c r on ( ? ) v com (v) 0 4 6 8 10 12 2 v+ = 3.3v i com = 1ma 25c 85c -40c 5 3 5 7 9 v+ = 12v 25c 85c -40c 7 9 11 13 15 v+ = 5v 25c -40c 85c 8 12 16 20 ISL43110, isl43111
9 figure 9. charge inje ction vs switch voltage figure 10. digital switching point vs supply voltage figure 11. turn - on time vs supply voltage f igure 12. turn - off time vs supply voltage figure 13. turn - on time vs switch voltag e figure 14. turn - off time vs switch voltage typical performance curves t a = 25c, unless otherwise specified (continued) q (pc) v com (v) 024681012 -50 0 50 100 150 v+ = 3.3v v+ = 5v v+ = 12v v+ = 12v v+ (v) 25 3.0 2.5 2.0 1.5 1.0 0.5 34 678910111213 v inh and v inl (v) -40c -40c 85c v inh v inl 25c 85c 25c t on (ns) v+ (v) 110 90 70 50 30 23456789101112 40 60 80 100 -40c 85c r l = 300 ? v com = (v+) - 1v 130 120 140 25c t off (ns) v+ (v) 50 40 30 20 10 23456789101112 25c -40c 85c r l = 300 ? v com = (v+) - 1v 60 t on (ns) v com (v) 10 20 30 40 50 60 r l = 300 ? v+ = 3.3v v+ = 5v v+ = 12v 0123456789101112 t off (ns) v com (v) 10 15 20 25 30 35 40 0123456789101112 r l = 300 ? v+ = 3.3v v+ = 5v v+ = 12v ISL43110, isl43111
10 die characteristics substrate potential (powered up): gnd transistor count: ISL43110: 40 isl43111: 40 process: si gate cmos figure 15. frequency respons e figure 16. off isolation figure 17. psrr vs frequency typical performance curves t a = 25c, unless otherwise specified (continued) frequency (mhz) 0 -3 -6 normalized gain (db) gain phase 0 20 40 60 80 100 phase (degrees) 1 10 100 600 v in = 0.2v p-p to 2.5v p-p (v+ = 3.3v) v in = 0.2v p-p to 5v p-p (v+ = 12v) r l = 50 ? v+ = 3.3v v+ = 12v v+ = 12v v+ = 3.3v frequency (hz) 1k 100k 1m 100m 500m 10k 10m 110 10 20 30 40 50 60 70 80 90 100 off isolation (db) v+ = 3v to 13v r l = 50 ? frequency (mhz) 1 10 100 1000 0.3 30 40 50 psrr (db) 60 70 80 20 10 0 r l = 50 ? v+ = 12v, switch on v+ = 3.3v, switch on v+ = 12v, switch off v+ = 3.3v, switch off ISL43110, isl43111
11 small outline plast ic packages (soic) index area e d n 123 -b- 0.25(0.010) c a m bs e -a- l b m -c- a1 a seating plane 0.10(0.004) h x 45 o c h 0.25(0.010) b m m a notes: 1. symbols are defined in the ?mo series symbol list? in section 2.2 of publication number 95. 2. dimensioning and tolerancing per ansi y14.5m - 1982. 3. dimension ?d? does not include mold flash, protrusions or gate burrs. mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. dimension ?e? does not include interlead flash or protrusions. interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. the chamfer on the body is optional. if it is not present, a visual index feature must be located within the crosshatched area. 6. ?l? is the length of terminal for soldering to a substrate. 7. ?n? is the number of terminal positions. 8. terminal numbers are shown for reference only. 9. the lead width ?b?, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. controlling dimension: millimete r. converted inch dimensions are not necessarily exact. m8.15 (jedec ms-012-aa issue c) 8 lead narrow body small outline plastic package symbol inches millimeters notes min max min max a 0.0532 0.0688 1.35 1.75 - a1 0.0040 0.0098 0.10 0.25 - b 0.013 0.020 0.33 0.51 9 c 0.0075 0.0098 0.19 0.25 - d 0.1890 0.1968 4.80 5.00 3 e 0.1497 0.1574 3.80 4.00 4 e 0.050 bsc 1.27 bsc - h 0.2284 0.2440 5.80 6.20 - h 0.0099 0.0196 0.25 0.50 5 l 0.016 0.050 0.40 1.27 6 n8 87 0 o 8 o 0 o 8 o - rev. 0 12/93 ISL43110, isl43111
12 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality ce rtifications can be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corporation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that da ta sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com ISL43110, isl43111 small outline transistor plastic packages (sot23-5) d e 1 e e1 c l c c l e b c l a2 a a1 c l 0.20 (0.008) m 0.10 (0.004) c c -c- seating plane 4 5 123 view c view c l r1 r 4x 1 4x 1 gauge plane l1 seating l2 c plane c base metal with c1 b1 plating b p5.064 5 lead small outline transistor plastic package symbol inches millimeters notes min max min max a 0.036 0.057 0.90 1.45 - a1 0.000 0.0059 0.00 0.15 - a2 0.036 0.051 0.90 1.30 - b 0.012 0.020 0.30 0.50 - b1 0.012 0.018 0.30 0.45 c 0.003 0.009 0.08 0.22 6 c1 0.003 0.008 0.08 0.20 6 d 0.111 0.118 2.80 3.00 3 e 0.103 0.118 2.60 3.00 - e1 0.060 0.067 1.50 1.70 3 e 0.0374 ref 0.95 ref - e1 0.0748 ref 1.90 ref - l 0.014 0.022 0.35 0.55 4 l1 0.024 ref. 0.60 ref. l2 0.010 ref. 0.25 ref. n5 55 r 0.004 - 0.10 - r1 0.004 0.010 0.10 0.25 0 o 8 o 0 o 8 o - rev. 2 9/03 notes: 1. dimensioning and tolerance per asme y14.5m-1994. 2. package conforms to eiaj sc-74 and jedec mo178aa. 3. dimensions d and e1 are exclusiv e of mold flash, protrusions, or gate burrs. 4. footlength l measured at reference to gauge plane. 5. ?n? is the number of terminal positions. 6. these dimensions apply to the flat section of the lead between 0.08mm and 0.15mm from the lead tip. 7. controlling dimension: millime ter. converted inch dimen- sions are for reference only.

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